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THCS255 [Planning]
Optical NetworkSideband Aggregator Planning THCS255 [Planning]
Overview
The THCS255 is a transceiver IC with serializer and deserializer on a single chip that aggregates the sideband signals for PCIe Sideband Signals (PESTI, PERST#, PWNEN, CLKREQ#, WAKE#, PWRBRK# or any GPIO) and 2-wire serial interface signals and converts them into two pairs of differential signals for transmission and reception.
The 8B10B encoding and decoding used in the THCS255 provides high robustness, DC balanced signals, and easy connection to optical/wireless communication devices.
- Up to 20-bit GPIOs
- Support Sideband Signals (PESTI, PERST#, PWNEN, CLKREQ#, WAKE#, PWRBRK# or any GPIO)
- 2-wire serial interface fast mode can be bridged
- I/O expansion function from 2-wire serial interface to parallel GPIO
- Adaptive equalizer supports high-loss transmission media
- 8B10B encoding/decoding
- External reference clock frequency: 15-133.3MHz
- Internal OSC clock frequency : 20MHz, 40MHz, 8-0MHz
- Single power supply operation: 1.7V - 3.6V
- QFN package 5x5mm package
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Data Sheet