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LVDS

THF9306A

Summary

THF9306A is designed to reverse video data sent from host and make them match to display and its driving system.

Features

¡¦ Input pixel clock max frequency :83MHz
¡¦ Default resolution : 1920x1080p 60Hz.
¡¦ Support LVDS 18/24/30bit color
¡¦ Co-operation with 64Mbit SDRAMx2pcs
¡¦ Support dual pixel link
¡¦ Left-Right swap support
  ¡Êdefault active¡Ë
¡¦ Top-Bottom swap support
  ¡Êdefault active)
¡¦ Dual input alignment
  < +/-2 pixel clock period
¡¦ Support spread spectrum clocking
¡¦ LVDS output reduced voltage swing
  select
¡¦ 2-wire serial interface :
  2kbits EEPROM read
¡¦ Support default setting use
  without EEPROM
¡¦ VDD33=3.0-3.6V, VDD18=1.65-1.95V
¡¦ Operating temperature :
  0-70 degrees C
¡¦ eLQFP-216
  ¡Ê24mmx24mm, lead pitch 0.5mm)

Block Diagram



Character

Bit
Rx Core
Tx Core
Input CLK
Frequency
Output CLK
Frequency
SS
VCC
 10  2  2  45-83MHz  45-83MHz  ¡ý 3.3V/1.8V

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